Impact of planarized gate electrode in bottom-gate thin-film transistors

Authors

  • M.A. Domínguez
  • P. Rosales
  • A. Torres
  • F. Flores
  • J.A. Luna
  • S. Alcantara
  • M. Moreno

Keywords:

Thin-film transistor, hydrogenated amorphous silicon-germanium, simulation, planarization

Abstract

In this work, the fabrication of bottom-gate TFTs with unplanarized and planarized gate electrode are reported, as well simulations of the impact of the gate planarization in the TFTs are presented. Previously in literature, a reduction of the contact resistance has been attributed to this planarized structure. In order to provide a physical explanation of this improvement, the electrical performance of ambipolar a-SiGe:H TFTs with planarized gate electrode by Spin-On Glass is compared with unplanarized ambipolar a-SiGe:H TFTs. Then, the properties in the main device interfaces are analyzed by physically-based simulations. The planarized TFTs have better characteristics such as field-effect mobility, on-current, threshold voltage and on/off-current ratio which are consequence of the improved contact resistance.

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Published

2016-01-01

How to Cite

[1]
M. Domínguez, “Impact of planarized gate electrode in bottom-gate thin-film transistors”, Rev. Mex. Fís., vol. 62, no. 3 May-Jun, pp. 223–0, Jan. 2016.

Issue

Vol. 62 No. 3 May-Jun (2016): Revista Mexicana de Física.

Section

Articles

License

Authors retain copyright and grant the Revista Mexicana de Física right of first publication with the work simultaneously licensed under a CC BY-NC-ND 4.0 that allows others to share the work with an acknowledgement of the work's authorship and initial publication in this journal.