Electrical transport phenomena in nanostructured porous-silicon films

Abstract

The charge transport mechanisms in nanostructured porous silicon (PS) films were studied through current-voltage (I-V) measurements of planar Au/PS/Au structures at 300 K. The films were formed by electrochemical etching of 1-5 Ω-cm p-type Si (100) wafers producing PS layers of 4.48 x 10⁹ Ω-cm. The charge transport is limited both by the space charge limited currents (SCLC) and the carrier trapping-detrapping kinetics in the inherent localized PS energy levels. I-V characteristics evolve according to the trapping-detrapping carrier kinetics in the PS films showing that the electrical current can be controlled by applying external electric fields. An equivalent trap filling limiting voltage (V_TFL) was identified that shifts between 1 and 3 volts by the carrier trapping-detrapping kinetics from the PS intrinsic defect states. An energy band diagram for the PS films is schematically depicted including the influence of the intrinsic PS defect states. To give a reasonable explanation of the found behavior the existence of a thin silicon oxide film covering the network-like-silicon-nanocrystallites is required, in agreement with the widely accepted PS structural models.