Electrical characterization of planarized a-SiGe:H Thin-film Transistors

Abstract

In this work the electrical characterization of n-channel a-SiGe:H TFTs with planarized gate electrode is presented. The planarized a-SiGe:H TFTs were fabricated at 200$^{\circ}$C on corning glass substrate. The devices exhibit a subthreshold slope of 0.56 V/Decade, an on/off-current ratio approximately of 10$^{6}$ and off-current approximately of 0.3$\times$10$^{ - 12}$ A. The results show an improvement of the electrical characteristics when are compared to those unplanarized devices fabricated at higher temperature. Moreover, the simulation of the device using a SPICE model is presented.